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MC34060A, MC33060A Fixed Frequency, PWM, Voltage Mode Single Ended Controllers
The MC34060A is a low cost fixed frequency, pulse width modulation control circuit designed primarily for single-ended SWITCHMODEt power supply control. The MC34060A is specified over the commercial operating temperature range of 0 to +70C, and the MC33060A is specified over an automotive temperature range of -40 to +85C. * Complete Pulse Width Modulation Control Circuitry * On-Chip Oscillator with Master or Slave Operation * On-Chip Error Amplifiers * On-Chip 5.0 V Reference, 1.5% Accuracy * Adjustable Dead-Time Control * Uncommitted Output Transistor Rated to 200 mA Source or Sink * Undervoltage Lockout
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14 SO-14 D SUFFIX CASE 751A 1 14 PDIP-14 P SUFFIX CASE 646 14 1 x = 3 or 4 A = Assembly Location WL = Wafer Lot YY, Y = Year WW = Work Week 1 MC3x060AP AWLYYWW MC3x060AD AWLYWW
14 1
PIN CONNECTIONS ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 14 of this data sheet.
Noninv Input Inv Input Compen/PWM Comp Input Dead-Time Control CT RT Ground
1 2 3
+ Error Amp 1 -
Error 2 Amp VCC 5.0 V ref
+ -
Noninv 14 Input Inv 13 Input 12 Vref 11 N.C. 10 VCC
0.1V 4 5 Oscillator 6
9 Q1 8
C E
7
(Top View)
(c) Semiconductor Components Industries, LLC, 2002
1
January, 2002 - Rev. 3
Publication Order Number: MC34060A/D
MC34060A, MC33060A
MAXIMUM RATINGS (Full operating ambient temperature range applies, unless otherwise noted.)
Rating Power Supply Voltage Collector Output Voltage Collector Output Current (Note 1) Amplifier Input Voltage Range Power Dissipation @ TA 45C Operating Junction Temperature Storage Temperature Range Operating Ambient Temperature Range For MC34060A For MC33060A Symbol VCC VC IC Vin PD TJ Tstg TA 0 to +70 -40 to +85 Value 42 42 500 -0.3 to +42 1000 125 -55 to +125 Unit V V mA V mW C C C
THERMAL CHARACTERISTICS
Characteristics Thermal Resistance, Junction-to-Ambient Derating Ambient Temperature Symbol RJA TA P Suffix Package 80 45 D Suffix Package 120 45 Unit C/W C
RECOMMENDED OPERATING CONDITIONS
Condition/Value Power Supply Voltage Collector Output Voltage Collector Output Current Amplifier Input Voltage Current Into Feedback Terminal Reference Output Current Timing Resistor Timing Capacitor Oscillator Frequency PWM Input Voltage (Pins 3 and 4) 1. Maximum thermal limits must be observed. Symbol VCC VC IC Vin Ifb Iref RT CT fosc - Min 7.0 - - -0.3 - - 1.8 0.00047 1.0 -0.3 Typ 15 30 - - - - 47 0.001 25 - Max 40 40 200 VCC -2 0.3 10 500 10 200 5.3 Unit V V mA V mA mA k F kHz V
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MC34060A, MC33060A
ELECTRICAL CHARACTERISTICS (VCC = 15 V, CT = 0.01 F, RT = 12 k, unless otherwise noted. For typical values TA = 25C,
for min/max values TA is the operating ambient temperature range that applies, unless otherwise noted.) Characteristics REFERENCE SECTION Reference Voltage (IO = 1.0 mA, TA 25C) TA = Tlow to Thigh - MC34060A TA = Tlow to Thigh - MC33060A Line Regulation (VCC = 7.0 V to 40 V, IO = 10 mA) Load Regulation (IO = 1.0 mA to 10 mA) Short Circuit Output Current (Vref = 0 V) OUTPUT SECTION Collector Off-State Current (VCC = 40 V, VCE = 40 V) Emitter Off-State Current (VCC = 40 V, VCE = 40 V, VE = 0 V) Collector-Emitter Saturation Voltage (Note 2) Common-Emitter (VE = 0 V, IC = 200 mA) Emitter-Follower (VC = 15 V, IE = -200 mA) Output Voltage Rise Time (TA = 25C) Common-Emitter (See Figure 12) Emitter-Follower (See Figure 13) Output Voltage Fall Time (TA = 25C) Common-Emitter (See Figure 12) Emitter-Follower (See Figure 13) ERROR AMPLIFIER SECTION Input Offset Voltage (VO[Pin 3] = 2.5 V) Input Offset Current (VC[Pin 3] = 2.5 V) Input Bias Current (VO[Pin 3] = 2.5 V) Input Common Mode Voltage Range (VCC = 40 V) Inverting Input Voltage Range Open-Loop Voltage Gain (VO = 3.0 V, VO = 0.5 V to 3.5 V, RL = 2.0 k) Unity-Gain Crossover Frequency (VO = 0.5 V to 3.5 V, RL = 2.0 k) Phase Margin at Unity-Gain (VO = 0.5 V to 3.5 V, RL = 2.0 k) Common Mode Rejection Ratio (VCC = 40 V, Vin = 0 V to 38 V)) Power Supply Rejection Ratio (VCC = 33 V, VO = 2.5 V, RL = 2.0 k) Output Sink Current (VO[Pin 3] = 0.7 V) Output Source Current (VO[Pin 3] = 3.5 V) VIO IIO IIB VICR VIR(INV) AVOL fc m CMRR PSRR IO- IO+ - - - 0 to VCC -2.0 -0.3 to VCC-2.0 70 - - 65 - 0.3 -2.0 2.0 5.0 -0.1 - - 95 600 65 90 100 0.7 -4.0 10 250 -2.0 - - - - - - - - - mV nA A V V dB kHz deg. dB dB mA mA IC(off) IE(off) Vsat(C) - - - 2.0 - 1.1 100 -100 1.5 A A V Vref 4.925 4.9 4.85 - - 15 5.0 - - 2.0 2.0 35 5.075 5.1 5.1 25 15 75 V Symbol Min Typ Max Unit
Regline Regload ISC
mV mV mA
Vsat(E) tr
-
1.5
2.5 ns
- - tr - -
100 100 40 40
200 200 ns 100 100
2. Low duty cycle techniques are used during test to maintain junction temperature as close to ambient temperatures as possible. Thigh = +85C for MC33060A Tlow = -40C for MC33060A = 0C for MC34060A = +70C for MC34060A
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MC34060A, MC33060A
ELECTRICAL CHARACTERISTICS (continued) (VCC = 15 V, CT = 0.01 F, RT = 12 k, unless otherwise noted.
For typical values TA = 25C, for min/max values TA is the operating ambient temperature range that applies, unless otherwise noted.) Characteristics PWM COMPARATOR SECTION (Test circuit Figure 11) Input Threshold Voltage (Zero Duty Cycle) Input Sink Current (V[Pin 3] = 0.7 V) DEAD-TIME CONTROL SECTION (Test circuit Figure 11) Input Bias Current (Pin 4) (Vin = 0 V to 5.25 V) Maximum Output Duty Cycle (Vin = 0 V, CT = 0.01 F, RT = 12 k) (Vin = 0 V, CT = 0.001 F, RT = 47 k) Input Threshold Voltage (Pin 4) (Zero Duty Cycle) (Maximum Duty Cycle) OSCILLATOR SECTION Frequency (CT = 0.01 F, RT = 12 k, TA = 25C) TA = Tlow to Thigh - MC34060A TA = Tlow to Thigh - MC33060A (CT = 0.001 F, RT = 47 k) Standard Deviation of Frequency* (CT = 0.001 F, RT = 47 k) Frequency Change with Voltage (VCC = 7.0 V to 40 V) Frequency Change with Temperature (TA =Tlow to Thigh) (CT = 0.01 F, RT = 12 k) UNDERVOLTAGE LOCKOUT SECTION Turn-On Threshold (VCC increasing, Iref = 1.0 mA) Hysteresis TOTAL DEVICE Standby Supply Current (Pin 6 at Vref, all other inputs and outputs open) (VCC = 15 V) (VCC = 40 V) Average Supply Current (V[Pin 4] = 2.0 V, CT = 0.001 F, RT = 47 k). See Figure 11. ICC - - IS - 5.5 7.0 7.0
N
Symbol
Min
Typ
Max
Unit
VTH II
- 0.3
3.5 0.7
4.5 -
V mA
IIB(DT) DCmax
-
-1.0
-10
A %
90 - VTH - 0
96 92 2.8 -
100 - V 3.3 -
fosc 9.7 9.5 9.0 - fosc fosc(V) fosc(T) - - 4.0 - - - - - 10.5 - - 25 1.5 0.5 11.3 11.5 11.5 - - 2.0
kHz
% % %
Vth VH
4.0 50
4.7 150
5.5 300
V mV
mA 10 15 - mA
*Standard deviation is a measure of the statistical distribution about the mean as derived from the formula; =
(xn -x)2 n-1 N-1
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MC34060A, MC33060A
6 5 RT CT 4 0.12V 0.7V Oscillator Dead-Time Comparator Undervoltage Lockout + VTH PWM. Comparator 2 + 13 14 Error Amp 2 7 Gnd 9 Q1 8 Collector Emitter
Reference Regulator
10
VCC
Dead-Time Control
+ +
12
Ref Out
0.7mA + 1 2 Error Amp 1 1
3 Feedback/PWM Comparator Input
This device contains 46 active transistors.
Figure 1. Block Diagram
Description The MC34060A is a fixed-frequency pulse width modulation control circuit, incorporating the primary building blocks required for the control of a switching power supply (see Figure 1). An internal-linear sawtooth oscillator is frequency-programmable by two external components, RT and CT. The approximate oscillator frequency is determined by:
fosc ^ 1.2 RT * CT
Output pulse width modulation is accomplished by comparison of the positive sawtooth waveform across capacitor CT to either of two control signals. The output is enabled only during that portion of time when the sawtooth voltage is greater than the control signals. Therefore, an increase in control-signal amplitude causes a corresponding linear decrease of output pulse width. (Refer to the Timing Diagram shown in Figure 2.)
For more information refer to Figure 3.
Capacitor CT Feedback/P.W.M. Comparator Dead-Time Control
Output Q1, Emitter
Figure 2. Timing Diagram
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MC34060A, MC33060A
APPLICATIONS INFORMATION The control signals are external inputs that can be fed into the dead-time control, the error amplifier inputs, or the feed-back input. The dead-time control comparator has an effective 120 mV input offset which limits the minimum output dead time to approximately the first 4% of the sawtooth-cycle time. This would result in a maximum duty cycle of 96%. Additional dead time may be imposed on the output by setting the dead time-control input to a fixed voltage, ranging between 0 V to 3.3 V. The pulse width modulator comparator provides a means for the error amplifiers to adjust the output pulse width from the maximum percent on-time, established by the dead time control input, down to zero, as the voltage at the feedback pin varies from 0.5 V to 3.5 V. Both error amplifiers have a common mode input range from -0.3 V to (VCC -2.0 V), and may be used to sense power supply output voltage and current. The error-amplifier outputs are active high and are ORed together at the noninverting input of the pulse-width modulator comparator. With this configuration, the amplifier that demands minimum output on time, dominates control of the loop. The MC34060A has an internal 5.0 V reference capable of sourcing up to 10 mA of load currents for external bias circuits. The reference has an internal accuracy of 5% with a typical thermal drift of less than 50 mV over an operating temperature range of 0 to +70C.
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MC34060A, MC33060A
A VOL , OPEN LOOP VOLTAGE GAIN (dB) 500 k f osc , OSCILLATOR FREQUENCY (Hz) VCC = 15 V 0.001 F 100 k 120 110 100 90 80 70 60 50 40 30 20 10 0 1.0 VCC = 15 V VO = 3.0 V RL = 2.0 k AVOL
10 k
CT = 0.01 F
1.0 k 500 1.0 k 2.0 k
1.0 F 5.0 k 10 k 20 k 50 k 100 k 200 k 500 k 1.0 M RT, TIMING RESISTANCE ()
10
100 1.0 k 10 k f, FREQUENCY (Hz)
100 k
0 -20 -40 -60 -80 -100 -120 -140 -160 -180 1.0 M
Figure 3. Oscillator Frequency versus Timing Resistance
Figure 4. Open Loop Voltage Gain and Phase versus Frequency
% DT, PERCENT DEAD TIME, Q1 OUTPUT
20 18 14 12 10 8.0 6.0 4.0 2.0 0 500 1.0 k 10 k 100 k fosc, OSCILLATOR FREQUENCY (Hz) 500 k 0.01 F CT = 0.001 F PERCENT DUTY CYCLE (%) 16
100 80 60 40 20 0 VCC = 15 V CT = 0.001 RT = 47 k
0
1.0 2.0 3.0 DEAD-TIME CONTROL VOLTAGE (V)
Figure 5. Percent Deadtime versus Oscillator Frequency
Figure 6. Percent Duty Cycle versus Dead-Time Control Voltage
1.9 V CE(SAT) , SATURATION VOLTAGE (V) V CE(SAT) , SATURATION VOLTAGE (V) 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 0 100 200 300 IE, EMITTER CURRENT (mA) 400 500
2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0 100 200 300 400 IC, COLLECTOR CURRENT (mA) 500
Figure 7. Emitter-Follower Configuration Output Saturation Voltage versus Emitter Current
Figure 8. Common-Emitter Configuration Output Saturation Voltage versus Collector Current
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, EXCESS PHASE (DEGREES) 3.5
MC34060A, MC33060A
VTH , UNDERVOLTAGE LOCKOUT THRESHOLD (V) 10 9.0 I CC, SUPPLY CURRENT (mA) 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 0 5.0 10 15 20 25 30 35 40 6.0
5.5 Turn On
5.0
4.5
Turn Off
4.0
0
5.0
10
15
20
25
30
35
40
VCC, SUPPLY VOLTAGE (V)
IL, REFERENCE LOAD CURRENT (mA)
Figure 9. Standby Supply Current versus Supply Voltage
Figure 10. Undervoltage Lockout Thresholds versus Reference Load Current
VCC = 15V DeadTime VCC 150 2W C E Output
+ Vin -
Error Amplifier Under Test
Test Inputs
Feedback Terminal (Pin 3) + Vref Other Error Amplifier 50k
Feedback RT CT (+) (-) Error (+) (-) Gnd
Ref Out
Figure 11. Error Amplifier Characteristics
Figure 12. Deadtime and Feedback Control
15V RL 68 C Output Transistor E CL 15pF VC Output Transistor E RL 68 C
15V
VE CL 15pF
90% VC 10% tr
90% 10% tf
90% 10% tr tf
90% VE 10%
Figure 13. Common-Emitter Configuration and Waveform
Figure 14. Emitter-Follower Configuration and Waveform
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MC34060A, MC33060A
VO To Output Voltage of System 1
Vref
R1 1 + 3 Vref R2 2 Error Amp 3 Error Amp 2 R1 Positive Output Voltage R1 VO = Vref (1 + ) R2 Negative Output Voltage R1 VO = -Vref (1 + ) R2 VO To Output Voltage of System + R2
Figure 15. Error Amplifier Sensing Techniques
Vref Output Q 6 RT 5 CT DT 4
R1 + R2 Output Q Vref DT R1 4 R2 CS
47k
0.001
Max % On Time 92 -
160 R 1+ 1 R2
Figure 16. Deadtime Control Circuit
Figure 17. Soft-Start Circuit
Vref
6 5 RT CT
RT Master CT Vref
6 5
RT CT
Slave
(Additional Circuits)
Figure 18. Slaving Two or More Control Circuits
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MC34060A, MC33060A
150H @ 2.0A Tip 32 47 4.7k 10 VCC + Comp + Vref DT 10/16V 4.7k 150 + 4.7k 390 0.1 4 5 0.001 CT 6 RT MC34060A E Gnd 8 7 MR850 + 1000 6.3V C 9 75
Vin = 8.0V to 40V
Vout 5.0V/1.0A
0.01 47k 1.0M + 0.01
1 2 3 14 13
50/50
4.7k
12
47k
Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency
Conditions Vin = 8.0 V to 40 V, IO = 1.0 A Vin = 12 V, IO = 1.0 mA to 1.0 A Vin = 12 V, IO = 1.0 A Vin = 12 V, RL = 0.1 Vin = 12 V, IO = 1.0 A
Results 25 mV 3.0 mV 0.5% 0.06%
75 mV p-p P.A.R.D. 1.6 A 73%
Figure 19. Step-Down Converter with Soft-Start and Output Current Limiting
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MC34060A, MC33060A
150H @ 4.0A 20H @ 1.0A *
Vin = 8.0V to 26V
MR850
Vout 28V/ 0.5A
22k 10 0.05 33k 4.7k + 2.7M 1 2 3 14 3.9k 13 12 VCC + Comp + Vref DT 4.7k 4 CT 5 0.001 47k 390 6 470 RT MC34060A E Gnd 8 7 0.1 300 Tip 111 C 9
50/35V
+ 470/ 35V
+
* 470/ 35V
Test Line Regulation Load Regulation Output Ripple Efficiency
Conditions Vin = 8.0 V to 26 V, IO = 0.5 A Vin = 12 V, IO = 1.0 mA to 0.5 A Vin = 12 V, IO = 0.5 A Vin = 12 V, IO = 0.5 A
Results 40 mV 0.14% 5.0 mV 0.18% 24 mV p-p P.A.R.D. 75%
*Optional circuit to minimize output ripple
Figure 20. Step-Up Converter
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MC34060A, MC33060A
Vin = 8.0V to 40V
Tip 32C 47 30k 10 0.01 47k 1 2 3 14 0.01 13 12 10k 10/16V 47k 3.3k 4.7k 820 4 VCC + Comp + Vref DT 5 0.001 CT 6 47k MC34060A E Gnd RT 8 7 C 9 75
MR851 20H * @ 1.0A
Vout -15V/ 0.25A
7.5k 50/50V +
1.0M
150H @ 2.0A
+
330/ 16V
330/ + 16V
*
1.0
Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency
Conditions Vin = 8.0 V to 40 V, IO = 250 mA Vin = 12 V, IO = 1.0 to 250 mA Vin = 12 V, IO = 250 mA Vin = 12 V, RL = 0.1 Vin = 12 V, IO = 250 mA
Results 52 mV 47 mV 0.35% 0.32%
10 mV p-p P.A.R.D. 330 mA 86%
*Optional circuit to minimize output ripple
Figure 21. Step-Up/Down Voltage Inverting Converter with Soft-Start and Current Limiting
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1N4003 3 each 0.0047 UL/CSA * * * 1N4742 1.0A T 15 Cold 2.2M 7.5k 33k 0.01 1N4687 6.8k * T1
T2
1N5824 2200/10V +
L1 +
5.0V/3.0A
3/200 Vac 1N4001 + 47/25V 10 VCC + Comp + Vref DT + Vout 5.0k Pout 25k 0.01 1.5k 10 27k 11k 2.7k Results 20 mV 0.40% 52 mV 0.26% 476 mV 9.5% 300 mV 2.5% 45 mV p-p P.A.R.D. 75 mV p-p P.A.R.D. 74% 4 CT 5 0.001 6 200 47k E Gnd RT 8 7 C
100/10V L2
1N4934 +
1N4934 + 1000/25V 1000/25V +
12/075A + Common + 10/35V -12/0.75A
22k 180/200V
10/35V L3
1 2 3 14 13 12 8.2k
9 1N4937
1N4934
115 Vac 20%
MC34060A
MPS A05 10/25V + MPS A55 MJE 13005
MC34060A, MC33060A
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*Optional R.F.I. Filter
47
1.0
1N4148 Test Line Regulation 5.0 V Line Regulation 12 V Load Regulation 5.0 V Load Regulation 12 V Output Ripple 5.0 V Output Ripple 12 V Efficiency Conditions V in = 95 Vac to 135 Vac, IO = 3.0 A V in = 95 Vac to 135 Vac, IO = 0.75 A V in = 115 Vac, IO = 1.0 A to 4.0 A V in = 115 Vac, IO = 0.4 A to 0.9 A V in = 115 Vac, IO = 3.0 A V in = 115 Vac, IO = 0.75 A V in = 115 Vac, IO 5.0 V = 3.0 A IO 12 V = 0.75 A
T1 - Coilcraft W2961 T2 - Core: Coilcraft 11-464-16, 0.025 gap in each leg. Bobbin: Coilcraft 37-573 Windings: Primary, 2 each, 75 turns #25 Awg Bifilar wound Feedback: 15 turns #26 Awg Secondary, 5.0 V, 6 turns @33 Awg Bifilar wound Secondary, 2 each, 14 turns #24 Awg Bifilar wound L1 - Coilcraft Z7156, 15 H @ 5.0 A L2, L3 - Coilcraft Z7157, 25 H @ 1.0 A
Figure 22. 33 W Off-Line Flyback Converter with Soft-Start and Primary Power Limiting
MC34060A, MC33060A
ORDERING INFORMATION
Device MC34060AD MC34060ADR2 MC34060AP MC33060AD MC33060ADR2 MC33060AP TA= -40 to +85C TA= 0 to +70C Operating Temperature Range Package SO-14 SO-14 PDIP-14 SO-14 SO-14 PDIP-14 Shipping 55 Units/Rail 2500 Tape & Reel 25 Units/Rail 55 Units/Rail 2500 Tape & Reel 25 Units/Rail
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MC34060A, MC33060A
PACKAGE DIMENSIONS
PDIP-14 P SUFFIX CASE 646-06 ISSUE M
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 --10_ 0.015 0.039 MILLIMETERS MIN MAX 18.16 18.80 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 --10_ 0.38 1.01
14
8
B
1 7
A F N -T-
SEATING PLANE
L C
K H G D 14 PL 0.13 (0.005)
M
J M
DIM A B C D F G H J K L M N
SO-14 D SUFFIX CASE 751A-03 ISSUE F
-A-
14 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
-B-
1 7
P 7 PL 0.25 (0.010)
M
B
M
G C
R X 45 _
F
-T-
SEATING PLANE
D 14 PL 0.25 (0.010)
K
M
M
S
J
TB
A
S
DIM A B C D F G J K M P R
MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50
INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019
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MC34060A, MC33060A
SWITCHMODE is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative.
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MC34060A/D

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